Xinpian, Tech
Wuhan, China
997
Followers
217
Following
99
Public Repos
0
Private Repos
Language Breakdown
Lines of code distribution across 42 owned repositories
402.0M
Total LOC
SystemVerilog
383,487,262 lines
95.4%
N/A
Scala
8,127,112 lines
2.0%
N/A
C
4,056,769 lines
1.0%
N/A
Nix
2,678,584 lines
0.7%
N/A
C++
1,171,781 lines
0.3%
N/A
Other
2,450,065 lines
0.6%
N/A
I
I-Shaped Developer
I-shapedSpecialist — deep expertise in SystemVerilog
SystemVerilog
Scala
C
Nix
C++
Collaboration Network
Global Impact visualization
Repos
279
PRs
0
Growth
+18%
Top Collaborators
No collaborator data yet.
Coding Streak
Contribution activity over the past year
1 day
1,277
Contributions
190
Commits
15
Pull Requests
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Jan
Feb
Mar
Apr
May
Jun
Mo
We
Fr
Based on GitHub activity
Less
More
Following
217 total
Synced via GitHub
Top Repositories
arithmetic
36
8
Nix
t1-micro58ae
16
4
SystemVerilog
rocket
A modern version of Rocket Core.
11
1
Scala
asl
MLIR Compiler for Arm Specification Lanuage
7
1
C++
riscv-cosim
7
1
Verilog
rocket-doc
7
0
Scala
diplomatictester
VIP library for you TileLink IP
7
3
Scala
chiselmodel
This is a experimental library interacting Chisel based design to foreign language with DPI, to inject arbitrary software model to Chisel and simulate together.
6
0
Scala
tilelink
5
2
Scala
SoC
4
2
Scala
Open Source Impact
Contributions to external projects
527 merged PRs
chipsalliance/rocket-chip
3796
chipsalliance/chisel
4684
herd/herdtools7
303
llvm/mlir-www
99
B-Lang-org/bsc
1118
llvm/circt
2162
indoorvivants/sn-bindgen
99
chipsalliance/t1
318
xinpian-tech/zaozi
72
xinpian-tech/gds-text
1
Contributed to 10 repositories